1. Field of the Invention
The present invention relates to a voltage regulator circuit including a booster circuit for applying electric current proportional to a load current to a differential amplifier circuit, and more particularly, to a booster circuit to increase the internal power dissipation according to the load current to obtain a fast transient response in order to improve the transient response characteristics of the voltage regulator.
2. Description of the Related Art
A conventional voltage regulator will be described. FIG. 5 is a circuit diagram of the conventional voltage regulator.
The conventional voltage regulator is made up of a differential amplifier circuit 612 for outputting a voltage proportional to a voltage difference from a reference voltage, an output transistor 610 controlled by the output voltage from this differential amplifier circuit 612 to output a voltage produced by a load current corresponding to this output voltage and feed back this output voltage to the differential amplifier circuit 612, and a booster circuit 613 for performing control based on the load current on this output transistor circuit 610 to apply electric current proportional to this load current to the differential amplifier circuit 612 in an area where the load current is low or apply an electric current limited to a constant value to the differential amplifier circuit 612 in an area where the load current is high. The differential amplifier circuit 612 is composed of PMOS type transistors 604 and 605, and NMOS type transistors 601, 602, and 614 to compare a reference voltage 600 with an output voltage 611 so as to output, to the output transistor 610 and the booster circuit 613, a voltage proportional to this voltage difference from commonly connected drains of the transistor 604 and the transistor 601. The transistors 604 and 605 are in a current mirror configuration, in which each source is connected to a power-supply voltage 150, each drain is connected to each of the drains of the transistors 601 and 605, respectively, and both gates are connected to each other and connected to the drain of the transistor 605. Further, the drain of the transistor 604 is connected to each of the gates of the output transistor 610 and a transistor 607 in the booster circuit 613, respectively. Each of the drains of the transistors 601 and 614 is connected to each of the drains of the transistors 604 and 605, each source is commonly connected to each of the drains of the transistors 602 and 606, respectively. Further, the gate of the transistor 601 is connected to the reference voltage 600 and the gate of the transistor 614 is connected to the drain of the output transistor 610, respectively. Each of the drains of the transistors 602 and 606 is commonly connected to each of the sources of the transistors 601 and 614, and each source is connected to the ground voltage, respectively. Further, the gate of the transistor 602 is connected to a bias voltage 603 and the gate of the transistor 606 is connected to the gate of a transistor 609 in the booster circuit 613, respectively. The booster circuit 613 is composed of a PMOS type transistor 607, an NMOS type depression transistor 608, an NMOS type transistor 609, and the like to perform control based on load current IL on the output transistor 610 so as to apply a differential amplifier circuit current IS proportional to this load current IL to the differential amplifier circuit 612 in an area where the load current IL is low or a differential amplifier circuit current IS limited to a constant value through a current-limiting transistor 608 (current limiter) to the differential amplifier circuit 612 in an area where the load current IL is high. The source of the transistor 607 is connected to the power-supply voltage 150 and the drain is connected to the source of the transistor 608, respectively, and further, the gate is connected to the drain of the transistor 604 in the differential amplifier circuit 612. The source of the transistor 608 is connected to the drain of the transistor 607 and the drain is connected to the drain of the transistor 609, respectively, and further, the gate is connected to the ground voltage. The transistor 609 forms a current mirror with the transistor 606 in the differential amplifier circuit 612, where the drain and gate are commonly connected to the gate of the transistor 606 and the source is connected to the ground voltage, respectively (for example, see FIG. 1 in Patent Document 1).    [Patent Document 1] Japanese Patent Application Publication No. 2001-34351